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TEA2019
CURRENT MODE SWITCHING POWER SUPPLY CONTROL CIRCUIT
. . . . . . . . .
DIRECT DRIVE OF THE EXTERNAL SWITCHING TRANSISTOR POSITIVE AND NEGATIVE OUTPUT CURRENTS UP TO 0.5A CURRENT LIMITATION TRANSFORMER DEMAGNETIZATION AND POWER TRANSISTOR SATURATION SENSING FULL OVERLOAD AND SHORT-CIRCUIT PROTECTION PROPORTIONAL BASE CURRENT DRIVING LOW STANDBY CURRENT BEFORE STARTING (1.6mA) SYNCHRONIZATION CAPABILITY WITH INTERNAL PLL THERMAL PROTECTION
Due to its current mode regulation, the TEA2019 facilitates design of power supplies with following features : High stability regulation loop. Automatic input voltage feed-forward in discontinuous mode fly-back. Automatic pulse-by-pulse current limitation. Typical applications : Video Display Units, TV sets, typewriters, micro-computers and industrial applications. For more details, see application note AN406/0591.
. . .
DESCRIPTION The TEA2019 is an 14-pin DIP low cost integrated circuit designed for the control of switch mode power supplies. It has the same basic functions as the TEA2018Abut with synchronization capability by internal PLL. It is particularly suitable for applications where oscillator synchronization is required. PIN CONNECTIONS
DIP 14 (Plastic package) ORDER CODE : TEA2019
OUTPUT AUXILIARY OUTPUT SUPPLY POSITIVE SUPPLY VOLTAGE SATURATION SENSING DEMAGNETIZATION SENSING ERROR AMPLIFIER NON-INVERTING INPUT SYNCHRONIZATION INPUT
1 2 3 4 5 6 7
14 13 12 11 10 9 8
NEGATIVE SUPPLY (OUTPUT STAGE) SUBSTRATE I C SAMPLE (NEGATIVE) GROUND OSCILLATOR CAPACITOR OSCILLATOR REFERENCE CURRENT PLL OUTPUT
2019-01.EPS
August 1992
1/7
TEA2019
BLOCK DIAGRAM
1 Output V AUX
DELAY 200ms
Undervoltage
V REF = 2.4V
IC RECOPY
V CC
R
S
&
V CC "good" Bias
&
THERMAL SHUT-DOWN
3.2V
Demagnetization Sensing
01.V
Sampling Pulse
OSCILLATOR
80% DUTY CYCLE LIMITATION
PHASE LOCKED LOOP
x 50
-1V VOLTAGE LIMITATION
PLL Out 8
Sync. 7
Ct 10
Rt 9
Feed-back 6
TEA2019
V CC
V REF
12 I SENSE
C om par ato r
IS
5
11 Ground
1
4 V CE Monitoring
SWITCH
Q
FLIP FLOP
V CC
3
Q
13 Substrate
1
14 V
2
ABSOLUTE MAXIMUM RATINGS
Symbol + V CC V(aux) - V CC IO (peak) II Tj Toper Tstg 2/7 Parameter Positive Supply Voltage Auxiliary Output Supply Voltage Negative Supply Voltage Peak Output Current (duty cycle < 5%) Input Current Pins 4-5 Junction Temperature Operating Ambient Temperature Range Storage Temperature Range Value 15 15 -5 1 5 150 - 20, + 70 - 40, + 150 Unit V V V A mA C C C
2019-01.TBL
2019-02.EPS
TEA2019
THERMAL DATA
Symbol Rth (j-a) Parameter Junction-ambient Thermal Resistance Value 80 Unit C/W
ELECTRICAL OPERATING CHARACTERISTICS Tamb = + 25oC, potentials referenced to ground (unless otherwise specified)
Symbol + V CC VCC VCC(start) VCC(stop) + V CC ICC(sb) Vth (Ic) R(Ic ) IS max AV + II V(REF) V(REF) T TOSC fOSC T fOSC VCC ton(min) Parameter Positive Supply Voltage Negative Supply Voltage + Minimum positive supply voltage required for starting (V CC rising) Minimum positive voltage below which device stops operating (V+CC falling) + Hysteresis on V CC Threshold + Standby Supply Current Before Starting [V CC < VCC(start)] Current Limitation Threshold Voltage (pin 12) Collector Current Sensing Input Resistance Demagnetization Sensing Threshold Demagnetization Sensing Input Current (pin 5 grounded) Maximum Duty Cycle Error Amplifier Gain Error Amplifier Input Current (non-inverting input) (pin 6) Internal Reference Voltage Reference Voltage Temperature Drift Oscillator Free-running Period ( R = 59k, C = 1.5nF) Oscillator Frequency Drift with Temperature
+ (V CC
Typ. 8 -3 6 4.2 4.9 0.7 1.1 1 -1100 -1000 1000 75 100 1 70 80 50 2 2.3 2.4 10 60
-4
Min. 6.6 -1
Max. 15 -5 6.6 5.6 1.6 1.6 -880 125
Unit V V V V V mA mV mV A % A V V/C
2.5
65 0.05 0.5 2
70
s %/C %/V s
2019-03.TBL 2019-07.TBL 2019-06.TBL 2019-05.TBL 2019-04.TBL
= + 8V)
Oscillator Frequency Drift with V+CC (+ 8V < V+CC < + 14V) Minimum Conducting Time (Ct = 1nF)
SYNCHRONIZATION INPUT (pin 7)
Symbol V7pp R (7) Parameter Peak to Peak Sawtooth Voltage Input Impedance Min. Typ. 0.5 20 Max. 2.5 Unit V k
PLL CHARACTERISTICS (see Test Circuit)
Symbol T Parameter Frequency Sensitivity Capture Range (TOSC = 64s Typ.) TSYN max - TOSC Min. TOSC - TSYN min 5.5 4.5 Typ. 100 8 8 Max. Unit Hz/A s s
SATURATION SENSING (pin 4)
Symbol V(4) I(4) Parameter Input Threshold Input Current (V4 > 3.2V) Input Internal Resistance Min. 50 1 Typ. 3.2 Max. Unit V A k
RECOMMENDED OPERATING CONDITIONS
Symbol + V CC VCC IO Foper Parameter Positive Supply Voltage Negative Supply Voltage Output Current Operating Frequency Min. Typ. 8 3 30 Max. Unit V V A kHz 3/7
0.5
2019-02.TBL
TEA2019
TYPICAL CIRCUIT
V6 V5 V3
22nF 10nF AS1 8.2k 10nF 7 10k 6 5 4 3 2 22nF 4.7F
470
10
1 RAMP GENERATOR IC 0V
TEA2019
8 9 10 11 12 13 14 -1V
22nF 56k 3.9k 3.3nF
59k 1% 1.5nF 100 47nF
4.7F
V10
V12
V14
GENERAL DESCRIPTION (see application note AN406/0591) Operating Principles (Figure 1) On every period, the beginning of the conduction time of the transistor is triggered by the fall of the oscillator saw-tooth which acts as clock signal. The period Tosc is given by : Tosc 0.69 Ct (Rt + 2000) (Tosc in seconds, Ct in Farad, Rt in ) The end of the conduction time is determined by a signal issued from comparing the following signals. a) the sawtooth waveform representing the collector current of the switching transistor, sampled across the emitter shunt resistor. b) the output of the error amplifier. Base Drive * Fast turn-on On each period, a current pulse ensures fast transistor switch-on. This pulse performs also the ton(min) function at the beginning of the conduction. * Proportional base drive In order to save power, the positive base current after the starting pulse becomes an image of the collector current. IC The ratio is programmed as follows (Figure 2). IB IC RB = IB RE
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Figure 1 : Current Mode Control
Vi
FLIP-FLOP OSCILLATOR ERROR AMPLIFIER V REF ERROR SIGNAL R COMPARATOR Re S IC Q
OUTPUT FILTER
I C SENSE
OSCILLATOR SAWTOOTH t
I C (sample)
Error Signal t
2019-05.EPS / 2019-04.EPS
FLIP-FLOP OUTPUT t
LOAD
2019-03.EPS
TEA2019
* Efficient and fast switch-off When the positive base drive is removed, 1s (typically) will elapse before the application of negative current therefore allowing a safe and rapid collector current fall. Safety Functions * Overload & short-circuit protection When the voltage applied to pin 12 exceeds the current limitation thershold voltage [Vth(Ic)], the output flip-flop is reset and the transistor is turned off. The shunt resistor Re must be calculated so as to obtain the current limitation threshold on pin 12 at the maximum allowable collector current. Figure 2
IC
* Demagnetization sensing This function disables any new conduction cycle of the transistor as long as the core is not completely demagnetized. When not used, pin 5 must be grounded. * ton(max) Outside the regulation area and in the absence of current limitation, the maximum conduction time is set at about 70% of the period. * ton(min) A minimum conducting time is ensured during each period (see Figure 2). * Supply voltage monitoring The TEA2019 will stop operatingif VCC+ on Pin 3 falls below the threshold level VCC(stop).
COLLECTOR CURRENT I C 0 IC RB TEA2019 1 IB 12 Re 0 IB IB t on(min) BIAS CURRENT RB Re t IC
2019-06.EPS
t
t
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2019-07.EPS
Starting Process (Figure 3) Prior to starting, a low current is drawn from the high voltage source through a high value resistor. This current charges the power supply storage capacitor of the device. No output pulses are available before the voltage on pin 3 has reached the threshold level [VCC(start), V+CC rising]. During this time the TEA2019 draws only 1mA (typically). When the voltage on pin 3 reaches this threshold base drive pulses appear. The energy drawn by these pulses tends to discharge the power supply storage capacitor. However a hysteresis of about 1.1V (typically) ( VCC) is implemented to avoid the device from stopping.
Figure 3 : Normal TEA2019 Start up Sequence
V CC V CC (start) 6V 4.9V V CC V CC (stop)
TEA2019
The TEA2019 has some additional capabilities compared to the TEA2018A : * The oscillator charge current its supplied through an internal current generator,programmed externally - instead of using an external charging resistor. The sawtooth so obtained is linear. * The oscillator can be synchronized through an internal PLL circuit. This feature provides synchronization between the external sync pulse and the end of the switching transistor current. The sync pulse can be for example the fly-back pulse of a TV horizontal sweep circuit. As indicated in the application diagram, this pulse is applied first to a R.C. network to obtain a low voltage sawtooth and then to pin 7 of the circuit. The PLL output (pin 8) supplies a correction current to pin 9 through an external resistor, so as to maintain the oscillator at the correct frequency (refer to application note AN406/0591 for detailed information). * In the TEA2019, the power supply of the positive output stage is separated from the main power supply, so that it can be supplied from a lower TYPICAL APPLICATION
BYT11-800 4 x 1N4007 47F 385V Sync. Pulse 1N4148 18 3.9 1N4148 n3 470F 82k 0.1F BYT 11-100 BYT11-1000 RF Filter 2 x 12mH BYT11-100 1.8k 10k 47nF 0.1F C2 33nF 0.5A 8 Mains Input 56k 9 56k 10 1.5nF 10F 3.3nF 22nF 4.7 11 12 13 14 100 0.47 10k 10 3.3 5 4 3 2 1 1k 3W n2 680 3W 2.2nF 10k 10F 120k 1W BYT11-800 n0 24V 0.5A 470F 40V 100F n1 160V 120V 0.4A
voltage in order to reduce the I.C. power dissipation. For low power applications, the circuit can be normally supplied by connecting pins 2 and 3 together. * In order to protect the substrate (pin 13) from the parasitic voltage peaks produced by negative output current peaks at pin 14, the substrate (pin 13) is internally separated from the negative supply (pin 14). They must be externally connected together. * The switching transistor saturation voltage can be monitored at pin 4. To achieve this, a high voltage diode must be connected between the collector of the switching transistor and pin 4. Also a resistor must be connected from pin 4 to V+CC (see application diagram). This arrangement is useful when the chosen value of base current is very low and as a consequence the saturationvoltage will be high. In thisevent, when VCE(sat) increases above 2.5V, the base current is interrupted before the normal end of the period. Remark : the TEA2019 can also operate without this protection.
7
6
BUV 46A
TEA2019
3.9k
Secondary Ground
. . .
6/7
PMAX = 60W Free-running Frequency : 15kHz 155VRMS VAC 250VRMS
. .
3 x 1N4001
Outputs: VCE
120V 3%, 0.4A 24V 3%, 0.5A Monitoring
2019-08.EPS
Primary Ground
TEA2019
PACKAGE MECHANICAL DATA 14 PINS - PLASTIC DIP
a1
I
b1
b Z e3
B
e Z
L
E
D
14
8
F
1
7
Dimensions a1 B b b1 D E e e3 F i L Z
Min. 0.51 1.39
Millimeters Typ.
Max. 1.65
Min. 0.020 0.055
Inches Typ.
Max. 0.065
0.5 0.25 20 8.5 2.54 15.24 7.1 5.1 3.3 1.27 2.54 0.050
0.020 0.010 0.787 0.335 0.100 0.600 0.280 0.201 0.130 0.100
DIP14.TBL
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without noti ce. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system confo rms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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PM-DIP14.EPS

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